Multi-CPU system having fault monitoring facility

Details Multi-CPU system having fault monitoring facility Multi-CPU system having fault monitoring facility

1994-03-21

1996-07-16

Beausoliel, Jr., Robert W.

G06F 1120

Patent

active

055375359

ABSTRACT:
A multi-CPU system including a fault monitoring facility comprises a plurality of central processing units interconnected through a system bus and sending and receiving data through a plurality of bus interface units inserted in the system bus. A fault monitoring bus in parallel with the system bus is commonly accessed by the bus interface units. A bus interface unit which detects a fault notifies the other bus interface units simultaneously using the fault monitoring bus. Data-originating interface units and data-destination interface units receive fault information of the location and type of fault, which has occurred. Swift recovery from a faulty state is enabled.

REFERENCES:
patent: 4412281 (1983-10-01), Works
patent: 4480307 (1984-10-01), Budde et al.
patent: 4719621 (1988-01-01), May
patent: 4787033 (1988-11-01), Bomba et al.
patent: 4933846 (1990-06-01), Humphrey et al.
patent: 4967344 (1990-10-01), Scavezze et al.
patent: 5195089 (1993-03-01), Sindhu et al.
patent: 5396602 (1995-03-01), Amini et al.

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