Multi-chips bumpless assembly package and manufacturing...

Details Multi-chips bumpless assembly package and manufacturing... Multi-chips bumpless assembly package and manufacturing...

2006-05-16

2006-05-16

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

Reexamination Certificate

active

07045391

ABSTRACT:
A multi-chips bumpless assembly package with a patterned conductive layer, a patterned dielectric layer and an insulation layer interposed between the chips is provided, which can shorten the distance of the electrical connection between the chips so as to upgrade the electrical performance of the assembly package and make the package thinner and thinner. Moreover, a manufacturing method thereof is also provided to form a package with high electrical performance.

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