Multi-chip packaging using bump technology

Details Multi-chip packaging using bump technology Multi-chip packaging using bump technology

1998-02-27

2000-07-18

Chaudhuri, Olik

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

257777, 257778, 257723, H01L 2302

Patent

active

060911387

ABSTRACT:
A multichip integrated semiconductor device having a portion of a first chip bonded to electrical leads in a package using a flip chip technology such as solder bump technology and a second chip bonded to a second portion of the first chip using a flip chip technology such as solder bump technology.

REFERENCES:
patent: 4122479 (1978-10-01), Sugawara et al.
patent: 5591959 (1997-01-01), Cigna et al.
patent: 5719438 (1998-02-01), Beilstein, Jr. et al.
patent: 5760478 (1998-06-01), Bozso et al.
patent: 5790384 (1998-08-01), Ahmad et al.
patent: 5828126 (1998-10-01), Thomas
patent: 5977640 (1999-11-01), Bertin et al.

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