Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2006-12-12
2006-12-12
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S185090, C365S185080, C365S230030
Reexamination Certificate
active
07149135
ABSTRACT:
A multi chip package type memory system comprising a volatile memory chip including a volatile memory cell region configured to store a data and a redundant memory cell region configured to be used to replace a defect in the volatile memory cell region; a non-volatile memory chip including a non-volatile memory cell region, the non-volatile memory chip configured to output a first redundant information that is an information based on whether the volatile memory cell region in the volatile memory chip has the defect or not; and internal line connected between the volatile memory chip and the non-volatile memory chip, the internal line configured to transmit the first redundant information from the non-volatile memory chip to the volatile memory chip, and the internal line configured to transmit at least one of a data, an address signal, and a control signal from/to an outside circuit.
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Kabushiki Kaisha Toshiba
Nguyen Viet Q.
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