Multi-chip package type memory system

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules

Reexamination Certificate

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C711S005000, C711S100000, C711S101000, C711S102000, C711S103000, C711S104000, C711S105000, C711S219000, C365S230010, C365S230030, C365S230080, C713S001000, C713S002000, C713S100000

Reexamination Certificate

active

10968970

ABSTRACT:
A multichip package type memory system is disclosed, which comprises a plurality of types of memory integrated circuits which are provided in a memory system in a package having an internal bus, and accessed from exterior of the package and/or within the package, and a controlling integrated circuit which is provided in the memory system in the package, and when an instruction of data transfer within the memory system is received from exterior of the package, controls an execution of the data transfer to be executed within the memory system such that data of memory cells at addresses of a first memory integrated circuit are read out, and the readout data are written into memory cells at addresses of a second memory integrated circuit.

REFERENCES:
patent: 6456517 (2002-09-01), Kim et al.
patent: 6721840 (2004-04-01), Allegrucci
patent: 2002/0118593 (2002-08-01), Takemae
patent: 2003/0156473 (2003-08-01), Sinclair et al.
patent: 5-299616 (1993-11-01), None
patent: 6-4410 (1994-01-01), None
patent: 11-353229 (1999-12-01), None
patent: 2001-243173 (2001-09-01), None

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