Multi-chip package for reducing test time

Details Multi-chip package for reducing test time Multi-chip package for reducing test time

2006-01-06

2009-08-04

Nguyen, Cuong Q (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S723000

Reexamination Certificate

active

07569919

ABSTRACT:
A multi-chip package is provided. The multi-chip package includes semiconductor chips. The multi-chip package receives selection signals for selecting two or more chips in response to the selection signals. Any number of chips may be simultaneously selected for a test and the test time can be reduced.

REFERENCES:
patent: 6219289 (2001-04-01), Satoh et al.
patent: 7116603 (2006-10-01), Kanda et al.
patent: 2006/0083096 (2006-04-01), Yang
patent: 2003-270302 (2003-09-01), None
patent: 2003-0093243 (2003-12-01), None
English language abstract of Korean Publication No. 2003-0093243.
English language abstract of Japanese Publication No. 2003-270302.

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