Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
1999-11-10
2001-03-27
Picardat, Kevin M. (Department: 2823)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S118000, C438S612000, C257S738000
Reexamination Certificate
active
06207467
ABSTRACT:
BACKGROUND
This invention relates generally to packaging integrated circuit dice in multi-chip modules.
In a variety of applications it is desirable to package more than one die in a single integrated circuit package. This may be the result of limits on the integratability of the components on the two dice into a single semiconductor die. These limitations may arise from the limits on the ability to integrate components into a single package. They may also arise from the fact that the components on the packages are incompatible with one another. For example, components on the two different dice may be subject to different voltage requirements. Alternatively, the two dice may require processing techniques which are incompatible.
In a number of cases, it may be desirable to package two dice into one package and to couple both dice through a common set of contacts to the outside world. Generally a die has a top side which contains contacts for making an electrical connection to the outside world and a bottom or backside. A challenge that arises is to put together a plurality of dice into a single package when each die can be only contacted on one side.
Thus, there is a continuing need for better ways to package multiple dice in a single package.
SUMMARY
In accordance with one aspect, a method of making multi-chip modules includes wire bonding a first die to contact in a first cavity of a structure. A second die is bump bonded through a contact on the structure over the first die. A solder ball is attached to the structure so that the solder ball is electrically coupled to the first and second dice.
Other aspects are set forth in the accompanying detailed description and claims.
REFERENCES:
patent: 5696031 (1997-12-01), Wark
patent: 5811879 (1998-09-01), Akram
patent: 5985695 (1999-11-01), Freyman et al.
Vaiyapuri Venkateshwaran
Yang Jicheng
Collins D. M.
Micro)n Technology, Inc.
Picardat Kevin M.
Trop Pruner & Hu P.C.
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