MRAM having current peak suppressing circuit

Details MRAM having current peak suppressing circuit MRAM having current peak suppressing circuit

2005-04-19

2005-04-19

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetic thin film

C365S158000

Reexamination Certificate

active

06882565

ABSTRACT:
An MRAM that employs a constant current write method includes a constant current circuit for a write, which is connected to a first power supply, and switch circuits which are connected to the constant current circuit to selectively drive a write line. In the MRAM, before the write current application timing, the node at one of the terminals of each of the switch circuits is short-circuited to the power supply to which the constant current source is connected.

REFERENCES:
patent: 6356477 (2002-03-01), Tran
patent: 6456524 (2002-09-01), Perner et al.
patent: 6667655 (2003-12-01), Chow et al.
patent: 6724653 (2004-04-01), Iwata et al.
Roy Scheuerlein, et al., “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, ISSCC 2000 Digest of Techincal Paper, International Solid-State Circuits Conference, Session 7 /TD: Emerging Memory & Device Technologies, Feb. 8, 2000, pp. 128-129.
Takeshi Honda, et al., “MRAM-Writing Circuitry to Compensate for Thermal-Variation of Magnetization-Reversal Current”, 2002 Symposium on VLSI Circuits Digest of Technical Papers, 2002, 1 page.

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