MRAM device fabricated using chemical mechanical polishing

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S003000, C438S257000

Reexamination Certificate

active

07119388

ABSTRACT:
The present invention provides a method of forming an MRAM cell which minimizes the occurrence of electrical shorts during fabrication. A first conductor is provided in a trench in an insulating layer and an upper surface of the insulating layer and the first conductor is planarized. Then, a first dielectric layer is deposited over the first conductor and insulating layer to a thickness at least greater than the thickness of a desired MRAM cell. The first dielectric layer is then patterned and etched to form an opening over the first conductor for the cell shapes. Then, the magnetic layers comprising the MRAM cell are consecutively formed within the cell shapes and the first dielectric layer.

REFERENCES:
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patent: 6716644 (2004-04-01), Nejad et al.
patent: 6743641 (2004-06-01), Yates et al.
patent: 6750069 (2004-06-01), Durcan et al.
patent: 6780652 (2004-08-01), Lee
Nanoscale and Novel Engineered Materials, S.J. Pearton, University of Florida, Slide Show of “Plasma Etching of GMR and CMR Materials,” Jan. 22, 1998, web address www.phys.ufl.edu/˜nanoscale/welcome.html/.

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