MRAM and data writing method therefor

Static information storage and retrieval – Systems using particular element – Magnetic thin film

Reexamination Certificate

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C365S173000

Reexamination Certificate

active

07009876

ABSTRACT:
In an MRAM having main and sub-structures, selecting transistors are arranged so as to meet the arrangement order of main word lines, sub-word lines and the selecting transistors. The selecting transistor is driven to cause a snap back phenomenon to occur. As a result, data can be written to a memory cell using a substrate current, not a channel current. Moreover, a data may be written into a selected memory cell by discharge the charge which is charged in the main and sub word lines corresponding to the memory cell.

REFERENCES:
patent: 6335890 (2002-01-01), Reohr et al.
patent: 6532163 (2003-03-01), Okazawa
patent: 6870759 (2005-03-01), Tsang
patent: 6891742 (2005-05-01), Takano et al.
patent: 2002/0034117 (2002-03-01), Okazawa
patent: 2002/0176272 (2002-11-01), DeBrosse et al.
patent: 2002-170379 (2002-06-01), None
Partial European Search Report dated Jul. 2, 2004.

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