MRAM and access method thereof

Details MRAM and access method thereof MRAM and access method thereof

2002-04-26

2004-08-31

Yoha, Connie C. (Department: 2818)

Static information storage and retrieval

Read only systems

Resistive

C365S225500, C365S230060, C365S232000, C365S046000

Reexamination Certificate

active

06785154

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a memory circuit block and a method for accessing the memory circuit block that can reduce and optimize a write current provided onto a write wordline and a bitline.
BACKGROUND OF THE INVENTION
The following description is provided as background to the invention. Referring to
FIG. 4
, a memory array of a memory circuit block is organized as a matrix of a plurality of bitlines
32
and a plurality of wordlines (write wordlines
30
and read wordlines
28
) and an MTJ (Magnetic Tunnel Junction) element, which is a memory cell element, is placed at each intersection. To write data in an MTJ element, an electric current is supplied to a write wordline
30
and a bitline
32
to produce a magnetic field on each of these lines. As shown in
FIG. 3
, the MTJ element
44
consists of at least three layers, i.e., a free layer
46
, which is a ferromagnetic layer the magnetization direction of which can be changed, a tunneling barrier
48
, which is an insulator layer conducting a tunnel current, and a pinned layer
50
, which is a ferromagnetic layer having a fixed magnetization direction. The magnetization direction of the free layer is changed according to the combined magnetic field of the write wordline
30
and the bitline
32
. The resistance of an equivalent resistance
52
, when a current passes across the free layer
46
and the pinned layer
50
through the tunnel barrier
48
layer, varies depending on the magnetization direction of the free layer
46
with respect to the magnetization direction of the pinned layer
50
. Data are distinguished (between “1” and “0”) based on this resistance difference. For example, the resistance becomes low to indicate “0” when the magnetization directions are the same, and the resistance becomes high to indicate “1” when the magnetization directions are opposite to each other.
The memory circuit block
54
used in a conventional memory such as MRAM shown in
FIG. 4
may perform an operation for writing the same data as that stored in an MTJ element into that MTJ element. That is, even though the data to be written is identical to that previously stored in the MTJ element, write currents still flow to the write wordline
30
and the bitline
32
to magnetize the free layer again in the same direction as already stored data. This operation is unnecessary at all and thus wasting power.
The memory circuit block
54
uses pulse currents as the write currents supplied onto the write wordline
30
and the bitline
32
. The write current, which is the average of the pulse currents per cycle time, is about 10 times larger than a read current. In addition, the amount of pulse current required for reversing the magnetization direction of the free layer
46
of the MTJ element
44
varies widely. A write current for an MTJ element
44
must be higher than the largest write current among all the memory cells. Therefore, a very large write current is required for data write operations in total, resulting in large power consumption during write operations compared with read operations in the MRAM.
It is an object of the present invention to provide a memory circuit block and a method for accessing the memory circuit block that can reduce and optimize a write electric current supplied onto a write wordline and a bitline.
SUMMARY OF THE INVENTION
A memory circuit block of the present invention comprises a memory array in which a plurality of wordlines and a plurality of bitlines are provided in matrix form and a memory element is provided at intersections of the wordlines and the bitlines, the memory element including at least a ferromagnetic layer having a magnetization direction determined by the orientation of a magnetic field generated by an electric current passing through respective bitline; a read wordline driver for applying a read voltage to a wordline; a write wordline driver for providing a write current onto the wordline; a bitline driver for providing a write current onto a bitline; a sensing amplifier for sensing and amplifying data in a memory element; an input/output pad for inputting and outputting data; a module for sensing a data write current passing thorough the bitline; and a module for generating a stop signal for stopping the supply of the data write current to the bitline and the wordline after data is written in the memory element.
A method for accessing a memory circuit block constituted as described above, comprises sensing a current passing through a bitline for writing data in a memory element, and generating a signal for stopping the data write current provided onto the wordline and the bitline after a change in current is detected when sensing the current.
Preferably, according to the memory circuit block and access method of the present invention, currents consumed in the memory circuit block can be reduced by performing a data read operation while performing a data write operation at substantially the same operation speeds as those of prior-art memory circuit blocks. In addition, write currents can be reduced compared with prior-art memory circuit blocks and access methods by only writing to a memory element when the data to be stored is different from the data already stored in the memory element.


REFERENCES:
patent: 5825682 (1998-10-01), Fukui
patent: 5982675 (1999-11-01), Fujimoto
patent: 6438665 (2002-08-01), Norman

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