Motor current signal processor including phase locked and delta

Details Motor current signal processor including phase locked and delta Motor current signal processor including phase locked and delta

1995-08-30

1996-08-27

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

327299, 327551, 318629, H03D 324

Patent

active

055508790

ABSTRACT:
A signal processor includes a phase looked loop for estimating a largest sine wave component phase and frequency element of an incoming analog signal to provide a component signal and a delta-adjusted subtraction loop for removing a largest sine wave component of the incoming signal. The subtraction loop includes a gain adapter for monitoring an output signal and calculating a gain for minimizing the magnitude of the output signal, a multiplier for multiplying the gain by the component signal to provide a multiplied signal, and a subtractor for subtracting the multiplied signal from the incoming analog signal and supplying the output signal to the gain adapter. The gain adapter in one embodiment includes an algorithm capable of repeating the following sequence during a predetermined period of time: adapting a gain by adding a voltage limit; calculating a present maximum absolute value of a subtracted signal (the output signal) over a measurement cycle; comparing the present maximum absolute value with a previous maximum absolute value and, if the present maximum absolute value is greater, changing the sign of the voltage limit, and adapting the gain by adding the voltage limit; multiplying the voltage limit by a fraction having a value less than one; and changing the previous maximum absolute value to the present maximum absolute value.

REFERENCES:
patent: 5124657 (1992-06-01), Waller, Jr.
patent: 5448598 (1995-09-01), Yousefi et al.
"Methods of Motor Current Signature Analysis" by G. B. Klinman, et al., Electric Machines & Power Systems, 20:463-474, 1992.

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