Mosfet with buried element isolation regions

Details Mosfet with buried element isolation regions Mosfet with buried element isolation regions

1992-11-30

1994-03-01

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257345, 257513, H01L 29784, H01L 29360

Patent

active

052910490

ABSTRACT:
The present invention comprises a buried element isolation region, an inversion preventing impurity diffusion region formed in a groove of a semi-conductor substrate, a shallow channel impurity diffusion region, a deep channel impurity diffusion region, source and drain diffusion regions formed inside the buried element isolation region, an electrode wiring layer connected to the buried element isolation region across these diffusion regions, a first side-wall impurity diffusion region which is along the buried element isolation region, is in contact with the source and drain diffusion regions, and is formed at a position corresponding to at least the electrode wiring layer in a shallow region from the substrate surface, and a second side-wall impurity diffusion region formed in a deep region separated from the substrate surface at a position below the first side-wall impurity diffusion region and having an impurity concentration which is different from that of the deep channel impurity diffusion region and is also different from each of impurity concentrations of the inversion preventing impurity diffusion region and the first side-wall impurity diffusion region. For this reason, characteristics such as a threshold value, a punchthrough, and a back gate effect of the semi-conductor device can be freely controlled.

REFERENCES:
patent: 4471525 (1984-09-01), Sasaki
patent: 4523369 (1985-06-01), Nagakubo
patent: 5021845 (1991-06-01), Hashimoto
patent: 5079602 (1992-01-01), Harada

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