MOSFET structure and fabrication process for decreasing threshol

Details MOSFET structure and fabrication process for decreasing threshol MOSFET structure and fabrication process for decreasing threshol

1996-04-26

1998-03-17

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257334, 257335, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

057290377

ABSTRACT:
Improved power MOSFET structure, and fabrication process are disclosed in this invention to achieve a low threshold voltage. The improved MOSFET device is formed in a semiconductor substrate with a drain region formed near a bottom surface of the substrate supporting a plurality of double-diffused vertical cells thereon wherein each of the vertical cells including a pn-junction having a body region surrounding a source region and each of the vertical cell further including a gate above the pn-junction. Each of the vertical cells further includes a source-dopant segregation reduction layer for reducing a surface segregation between the source region and an oxide layer underneath the gate whereby the body surface peak dopant concentration near an interface between the source region and the body region is reduced for reducing a threshold voltage of the MOSFET device. In another preferred embodiment, the source-dopant segregation reduction layer includes a LPCVD nitride layer formed on top of the polysilicon gates.

REFERENCES:
patent: 5252848 (1993-10-01), Adler

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