MOS varactor and fabricating method of the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29344, C257SE21364, C438S379000

Reexamination Certificate

active

07989868

ABSTRACT:
A MOS varactor for use in circuits and elements of a millimeter-wave frequency band, which is capable of reducing series resistance and enhancing a Q-factor by using a plurality of island-like gates seated in a well region of a substrate and gate contacts directly over the gates, includes: gate insulating layers arranged at equal intervals in the form of a (n×m) matrix, and a gate electrode placed on the gate insulating layers in a well region of a substrate; a gate contact which contacts the gate electrode; a first metal wire, which is electrically connected to the gate contact; source/drain contacts arranged at equal intervals in a matrix to form apexes of a square centered at the gate electrode and contact a doping region except for the bottom of the gate insulating layers; and a second metal wire, which is electrically connected to the source/drain contacts.

REFERENCES:
patent: 7091797 (2006-08-01), Takamatsu
patent: 7276746 (2007-10-01), Xu et al.
patent: 2003/0067026 (2003-04-01), Bulucea
patent: 2007/0007342 (2007-01-01), Cleeves et al.
patent: 1981087 (2008-10-01), None
I. Gutierrez et al., “MOS Varactors”, in “Design and Characterization of Integrated Varactors for RF Application”, 2006, John Wiley & Sons, Chapter 3, pp. 32-52.

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