Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-02-02
2009-11-24
Ha, Nathan W (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27112
Reexamination Certificate
active
07622760
ABSTRACT:
An n-well is formed in a p-type semiconductor substrate. A gate insulative film is formed to the p-type semiconductor substrate and the n-well, and a gate electrode is formed on the gate insulative film. A source layer selectively diffused with n-type impurities at high concentration is formed adjacent to the gate insulative film on the surface of the p-type semiconductor substrate, the n-well and a region extending on both of them. Further, a contact layer selectively diffused with p-type impurities at high concentration is formed being spaced from the source layer. A capacitance characteristic of good linearity over a wide range relative to the inter-terminal voltage VT can be obtained by applying an inter-terminal voltage VT between the source layer and the gate electrode. A MOS type variable capacitance device capable of obtaining a characteristic of good linearity for a wide range relative to the inter-terminal voltage VT and capable of coping with the improvement of the performance of a VCO circuit, etc., as well as simple in the structure, and capable of being manufactured easily with no requirement for addition of masks and steps can be provided.
REFERENCES:
patent: 4216451 (1980-08-01), Nishimura et al.
patent: 4453090 (1984-06-01), Sempel et al.
patent: 6228696 (2001-05-01), Nguyen et al.
patent: 6246076 (2001-06-01), Lipkin et al.
patent: 6407412 (2002-06-01), Krzysztof et al.
patent: 2001/0015449 (2001-08-01), Bai et al.
patent: 2004/0032004 (2004-02-01), Coolbaugh et al.
patent: 2004/0100340 (2004-05-01), Cui et al.
patent: 2004/0201052 (2004-10-01), Nakashiba
patent: 2004/0206999 (2004-10-01), Hyde et al.
patent: 2004/0263269 (2004-12-01), Takamatsu
patent: 2005/0093000 (2005-05-01), Tanimoto et al.
patent: 0 720 238 (1996-07-01), None
patent: 0 822 601 (1998-02-01), None
patent: 48-34685 (1973-05-01), None
patent: 50-28283 (1975-03-01), None
patent: 64-061070 (1989-03-01), None
patent: 2000-058877 (2000-02-01), None
Wong W et al, “Wide Tuning Range Inversion-Mode Gated Varactor and its Application on a 2-GHZ VCO”, 1999 Symposium on VLSI Circuits. Digest of Technical Papers. Kyoto, Jun. 17, 1999, pp. 53-54, vol. CONF. 13, New York, NY.
Aoki Koju
Ogawa Takaoki
Tomita Kazuhiro
Arent & Fox LLP
Fujitsu Microelectronics Limited
Ha Nathan W
LandOfFree
MOS type variable capacitance device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS type variable capacitance device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS type variable capacitance device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4094591