Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor
Reexamination Certificate
1999-10-21
2002-07-02
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Amorphous semiconductor
C438S593000, C438S590000, C438S652000, C438S489000, C438S592000, C257S051000, C257S064000
Reexamination Certificate
active
06413841
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a MOS type semiconductor device and a manufacturing method thereof, and more particularly, to a MOS type semiconductor device and a manufacturing method thereof capable of preventing ion from passing through a gate electrode at the time of ion implantation for forming a source region and a drain region.
2. Description of the Related Art
In a manufacturing method of a MOS type semiconductor device, if ion passes through a gate electrode at the time of ion implantation for forming a source region and a drain region, the ion reaches a gate oxide film and a channel portion of the transistor under the gate electrode. As a result, a threshold value of the transistor varies. Therefore, the transistor can not operate normally, and the semiconductor device does not function. For this reason, it is necessary to prevent ion from passing through the gate electrode at the time of ion implantation.
Conventionally, the thickness of a polysilicon film of a gate electrode is sufficiently increased so as to prevent the ion from passing through the gate electrode at the time of the ion implantation. However, according to this method, it is necessary to form a P
+
-polysilicon region by ion implantation as in a P-N gate system in which P-type polysilicon is applied to a P-channel MOS transistor. Therefore, even if it is necessary to prevent depletion in the gate electrode, the thickness of the gate polysilicon film can not be reduced. In consequence, there is a problem that it is not possible to prevent ion from passing through the gate electrode.
Thereupon, a method, for example, disclosed in Japanese Patent Application Laid-open No. Hei 4-287929 is used. If grain size in the polysilicon film is small, ion can not pass through the gate electrode easily. This method prevents the grain size of polysilicon from being increased, thereby preventing the ion from passing through the gate electrode.
FIG. 1
is a sectional view showing a gate electrode of a semiconductor device disclosed in Japanese Patent Application Laid-open No. Hei 4-287929.
As shown in
FIG. 1
, a polysilicon film
106
as a gate electrode is formed on a gate oxide film
105
and then, oxygen ions are implanted, thereby making a surface of the polysilicon film
106
into an amorphous state. As a result silicon region
107
is formed there. At the same time, the polysilicon film
106
includes many oxygen ions, which prevent the grain size from growing.
In this manner, by implanting the oxygen ions, the polysilicon is made into amorphous state, and the implanted oxygen ions prevent the grain size from growing. Therefore, it is possible to prevent the ion from passing through the gate electrode.
However, in order to increase the thickness of the layer having many oxygen ions in the polysilicon film
106
at the time of ion implantation for forming a source region and a drain region, it is necessary to implant the oxygen ions up to a portion close to the gate oxide film
105
. Therefore, there is a problem that the gate oxide film
105
is damaged by the ion implantation.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a MOS type semiconductor device and a manufacturing method thereof capable of preventing ion from passing through a gate electrode at the time of ion implantation for forming a source region and a drain region, such that a gate oxide film is not damaged by ion implantation.
According to one aspect of the present invention, a MOS type semiconductor device comprises a gate electrode comprising a plurality of laminated polycrystalline silicon layers each having a substantially single grain in a thickness direction of the gate electrode.
A polysilicon oxide film may be formed between the polycrystal silicon layers.
According to another aspect of the present invention, a manufacturing method of a MOS type semiconductor device comprises the steps of: forming a polysilicon film on a gate oxide film; forming a polysilicon oxide film on the polysilicon film; and heating the polysilicon film to allow crystal grain in the polysilicon film to grow from the gate oxide film and the polysilicon oxide film.
The step of forming the polysilicon oxide film may include a step of annealing the polysilicon film in oxygen atmosphere. The step of heating the polysilicon film may include a step of annealing the polysilicon film in nitrogen atmosphere.
According to another aspect of the present invention, a manufacturing method of a MOS type semiconductor device comprises a step of forming (N+1) layers (N is a natural number) of polysilicon films and N layers of polysilicon oxide films on a gate oxide film such that the polysilicon films and the polysilicon oxide films are alternately laminated on one another.
In the present invention, since the gate electrode is formed of two or more laminated polycrystalline grain layers each comprising a substantially single grain in the thickness direction, a grain boundary is formed in the gate electrode in its thickness direction. Therefore, it is possible to prevent the ion from passing through the gate electrode during the ion implantation process for formation a source region and a drain region.
REFERENCES:
patent: 6194267 (2001-02-01), Kaya
patent: 47-41265 (1972-12-01), None
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patent: 2-140853 (1990-05-01), None
patent: 2-298074 (1990-12-01), None
patent: 404035019 (1992-02-01), None
patent: 4-287929 (1992-10-01), None
patent: 5-102466 (1993-04-01), None
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