Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-12-03
2003-11-04
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S302000
Reexamination Certificate
active
06642575
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having field-effect transistors having a vertical structure, and a method of manufacturing such a semiconductor device.
2. Discussion of the Background
A field-effect transistor having a vertical columnar structure such as that shown in
FIG. 12
has heretofore been proposed for effective utilization of the area of a chip.
FIG. 12
is a cross-sectional view of a prior art field effect transistor with a vertical columnar structure. An isolation region
81
is formed over a surface portion of a p-type semiconductor substrate
80
so as to surround an active area, and a columnar silicon region
82
is formed in a portion of the active area. A gate electrode
84
made of polycrystalline silicon is formed over the side surface of the columnar silicon region
82
with a gate insulating film
83
made of silicon oxide being interposed therebetween. Arsenic (As) ions are implanted into the top surface of the columnar silicon region
82
and part of the surface of the semiconductor substrate
80
to form source and drain regions
86
. An interlayer insulating film
88
is deposited over the entire surface of the substrate
80
, and an interconnecting layer
89
made of aluminum is formed in each opening formed in the interlayer insulating film
88
.
However, this type of field-effect transistor having such a vertical columnar structure has several problems. Specifically, if the distance between the source and the drain of the transistor is less than a certain limit, control by the gate electrode does not work in the central portion of the columnar structure and punch-through occurs. This short channel effect is problematic. Accordingly, the field-effect transistor having such a vertical columnar structure has been difficult to scale.
If the concentration of an impurity in a channel formation region is high, the short channel effect is restrained, and the mobility of carriers is lowered by scattering due to the impurity. For this reason, it has been difficult to make such an element operate at high speeds. Moreover, an increase in the concentration of the impurity in the channel formation region causes loss of a region to which electric charge produced by hot carriers in the element can escape, and this electric charge stays in the channel region.
Incidentally, a structure, such as a silicon-on-insulator (SOI) structure, which has an impurity region near the center of a columnar structure is available as a method of restraining punch-through. However, this structure causes the area of a cross section of the source and drain, which is cut at right angles to the channel regions, to be small so that a current path is narrow and parasitic resistance increases.
FIG. 13
is a cross-sectional view of a conventional semiconductor integrated circuit. The integrated circuit includes a p-type silicon substrate
90
, an isolation region
91
, a p-well region
92
, an n-well region
93
, gate electrodes
94
, source or drain regions
95
, first interlayer insulating films
96
, second interlayer insulating films
97
, first-layer interconnecting lines
98
, and second-layer interconnecting lines
99
.
In this type of semiconductor integrated circuit, field-effect transistors are formed in only one plane. Consequently, the scale of integration is limited, so that the total length of interconnecting lines for interconnecting elements is long. The resultant interconnecting delay impairs the high-speed operation of the semiconductor integrated circuit.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a semiconductor device capable of effectively restraining a short channel effect in a field-effect transistor having a vertical columnar structure without impairing the operating speed of the device.
Another object of the present invention is to provide a semiconductor device that has increasable scalability of integration per semiconductor integrated circuit by using field-effect transistors having vertical columnar structure and which can restrain an interconnecting delay and operate at high speeds.
One aspect of the present invention provides a semiconductor device which comprises a field-effect transistor having a vertical columnar structure which includes a semiconductor layer formed over part of a semiconductor substrate, a gate electrode formed over a side surface of the semiconductor layer; and an insulation film for making a channel of the field-effect transistor substantially shallow in depth. The insulation film is formed in at least part of a region in which the channel of the field-effect transistor is formed. In this semiconductor device, the semiconductor layer may have a columnar structure and the gate electrode may be formed to surround the side surface of the semiconductor layer.
Another aspect of the present invention provides a semiconductor device having a field-effect transistor of vertical columnar structure comprising a columnar structure portion which includes a first semiconductor layer, a buried insulation film and a second semiconductor layer, all of which are stacked over a semiconductor substrate. The buried insulation film is set back inward from the first and second semiconductor layers. A third semiconductor layer is formed in at least a set-back portion of the buried insulation film at a side surface of the columnar structure portion. A gate electrode is formed over a surface of the third semiconductor layer with a gate insulating film being interposed therebetween.
The semiconductor substrate may be a first conductivity type, and the first and second semiconductor layers may be a second conductivity type. The second semiconductor layer may be formed over the entire side surface of the columnar structure portion, together with the set-back portion of the buried insulation film. The gate insulating film and the gate electrode may be formed over the entire side surface of the columnar structure portion and over part of the surface of the substrate. The values of source voltage, drain voltage and gate voltage may be selected to deplete a portion of a semiconductor region between a source region and a drain region other than an inversion layer region which is formed at an interface with a gate insulating film. The present invention may also provide that when a semiconductor which forms source and drain regions is cut in a plane perpendicular to the direction of a channel, the area of a cross section obtained is greater than the area of a cross section obtained when a semiconductor which forms a channel region is cut in a plane perpendicular to the direction of the channel. The channel region may be a single-crystal semiconductor.
Another aspect of the present invention provides a semiconductor device having a field-effect transistor of vertical columnar structure comprising a columnar structure portion including a buried insulation film and a first semiconductor layer which are stacked over a semiconductor substrate. The buried insulation film is formed set back inward from the first semiconductor layer; a second semiconductor layer is formed in at least a set-back portion of the buried insulation film of the columnar structure portion; and a gate electrode is formed over a surface of the second semiconductor layer with a gate insulating film being interposed therebetween.
Another aspect of the present invention provides a semiconductor device comprising a first element formation layer including a plurality of field-effect transistors of horizontal structure formed over a semiconductor substrate; a second element formation layer including a plurality of field-effect transistors of horizontal structure formed on a plane different from the first element formation layer; and a field-effect transistor of vertical columnar structure provided between the first element formation layer and the second element formation layer and connected to at least one transistor of the f
Ono Mizuki
Toriumi Akira
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Owens Douglas W.
Thomas Tom
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