Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-06-04
2004-03-16
Nguyen, Cuong (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S411000
Reexamination Certificate
active
06707112
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a MOS transistor with a ramped gate oxide thickness, a semiconductor device comprising a MOS transistor and a method for making a MOS transistor.
2. Discussion of the Background
Field effect transistors based on a metal-oxide semiconductor structure have revolutionized integrated circuit technology. However, conventional MOS transistors having a uniform gate oxide thickness across the length of the channel may exhibit high electric fields at the drain edge. These high electric fields can damage the drain region, especially an n-doped drain region. One source of damage associated with high electric fields is high-energy electrons or holes (referred to as hot electrons or hot holes), which can enter the oxide where they can be trapped, resulting in “oxide charging”. Over time, oxide charges will tend to gradually degrade the device performance, most notably by increasing the threshold voltage and decreasing the control of the gate on the drain current. Such damage can be fatal to the operation of a MOS device, and accordingly, a more reliable MOS device is sought.
SUMMARY OF THE INVENTION
Accordingly, one object of the invention is to provide a novel MOS transistor comprising (a) a substrate with a source region, a channel and a drain region, and (b) a gate comprising a gate material and a gate oxide having a source region edge and a drain region edge, wherein said gate oxide has a thickness greater at said drain region edge than at said source region edge.
Another embodiment of the present invention is directed to a circuit comprising the present MOS transistor.
Another embodiment of the present invention is directed to a method of making a transistor, having a gate oxide layer thicker at said drain region edge than at said source region edge.
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Cypress Semiconductor Corporation
Nguyen Cuong
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