Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-02-22
2011-02-22
Pham, Thanh V (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S288000, C257S365000, C257S366000
Reexamination Certificate
active
07893499
ABSTRACT:
An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source diffused region overlap the bottom surface of the gate trench. An integrated circuit containing an MOS transistor with a first trenched gate abutting an isolation dielectric layer over a drift region, and a second trenched gate located over a heavily doped buried layer. The buried layer is the same conductivity type as the drift region. A process of forming an integrated circuit containing an MOS transistor, which includes an isolation dielectric layer over a drift region of a drain of the transistor, and a gate formed in a gate trench which abuts the isolation dielectric layer. The gate trench is formed by removing substrate material adjacent to the isolation dielectric layer.
REFERENCES:
patent: 2008/0054325 (2008-03-01), Takahashi et al.
patent: 2009/0140343 (2009-06-01), Feilchenfeld et al.
patent: 2009/0179272 (2009-07-01), Campi et al.
Denison Marie
Efland Taylor Rice
Hu Binghua
Pendharkar Sameer
Seetharaman Sridhar
Brady III Wade J.
Fernandes Errol
Garner Jacqueline J.
Pham Thanh V
Telecky , Jr. Frederick J.
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