Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-01-10
2009-12-29
Estrada, Michelle (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S651000, C438S655000, C438S664000, C438S682000, C257S288000, C257S350000, C257S384000, C257S412000, C257SE29161, C257SE21199, C257SE21622, C257SE21636
Reexamination Certificate
active
07638427
ABSTRACT:
An MOS transistor with a fully silicided gate is produced by forming a silicide compound in the gate separately and independently of silicide portions located in source and drain zones of the transistor. To this end, the silicide portions of the source and drain zones are covered by substantially impermeable coatings. The coatings prevent the silicide portions of the source and drain zones from increasing in volume during separate and independent formation of the gate silicide compound. The silicide gate may thus be thicker than the silicide portions of the source and drain zones.
REFERENCES:
patent: 5352631 (1994-10-01), Sitaram et al.
patent: 6187675 (2001-02-01), Buynoski
patent: 6268255 (2001-07-01), Besser et al.
patent: 6306698 (2001-10-01), Wieczorek et al.
patent: 6458678 (2002-10-01), Spikes et al.
patent: 6562717 (2003-05-01), Woo et al.
patent: 6562718 (2003-05-01), Xiang et al.
patent: 6620718 (2003-09-01), Wieczorek et al.
patent: 6657244 (2003-12-01), Dokumaci et al.
patent: 2002/0058402 (2002-05-01), Wieczorek et al.
patent: 2005/0079695 (2005-04-01), Carriere et al.
patent: 2006/0121663 (2006-06-01), Fang et al.
Sim, et al, “Dual Work Function Metal Gates Using Full Nickel Silicidation of Doped Poly-Si,” IEEE Electron Device Letters, IEEE Service Center, New York, NY, US, vol. 24, No. 10, Oct. 2003, pp. 631-633, XP001175119; ISSN: 0741-3106.
Preliminary French Search Report, FR 05 00896, dated Nov. 11, 2005.
Aime Delphine
Froment Benoît
Estrada Michelle
Gardere Wynne & Sewell LLP
STMicroelectronics (Crolles 2) SAS
LandOfFree
MOS transistor with fully silicided gate does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS transistor with fully silicided gate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS transistor with fully silicided gate will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4056303