Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1996-07-01
1997-04-29
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257346, 257401, H01L 2976, H01L 2994, H01L 31062
Patent
active
056252161
ABSTRACT:
A self-aligned MOS transistor is described in which the gate-drain underdiffusion length is substantially greater than the gate-source underdiffusion length, resulting in a relatively high gate-drain capacitance. This is accomplished by driving in the drain dopants to have a greater diffusion depth and underdiffusion length than that of the source dopants. The increased gate-drain capacitance obviates the need to provide a separate gate-drain capacitor where increased gate-drain capacitance is desired.
REFERENCES:
patent: 4154626 (1979-05-01), Joy et al.
patent: 4757032 (1988-07-01), Contiero
patent: 4837186 (1989-06-01), Ohata et al.
patent: 4908328 (1990-03-01), Hu et al.
Semiconductor Devices--Physics and Technology, S.M. Sze, 1985, pp. 381-382.
"Process For Making Very Small, Asymmetric, Field-Effect Transistors", IBM Technical Disclosure Bulletin, vol. 30, Aug. 1987, pp. 1136-1137.
"High Performance FET Device Structure and Method", IBM Technical Disclosure Bulletin, vol. 15, Sep. 1972, p. 1342.
U.S. Statutory Invention Registration No. H986 issued Nov. 5, 1991 to Codella et al.
Loke Steven H.
Micrel Inc.
Ogonowsky Brian D.
LandOfFree
MOS transistor having increased gate-drain capacitance does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS transistor having increased gate-drain capacitance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS transistor having increased gate-drain capacitance will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-708325