MOS transistor circuit

Details MOS transistor circuit MOS transistor circuit

2005-11-10

2008-11-25

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S350000, C257S351000, C257S358000, C257S359000, C257SE29001

Reexamination Certificate

active

07456478

ABSTRACT:
A reduction of a current capability of a MOS transistor (P1) is compensated by dynamically changing a substrate bias of the MOS transistor (P1) in response to a fluctuation of the power supply, and thus an operating speed is stabilized automatically. An NMOS transistor (N2) generates a current (I2) that changes in response to an extent of fluctuation of the power supply voltage, and then the current (I2) is converted into a voltage via a resistor (R3) to apply a forward bias to a substrate (back gate) of the MOS transistor (P1). When the current capability of the MOS transistor (P1) is reduced owing to a reduction of the power supply voltage, an adjustment is carried out automatically to lower a threshold voltage of the MOS transistor and thus the operating speed can be compensated.

REFERENCES:
patent: 5742307 (1998-04-01), Watrobski et al.
patent: 2003/0223166 (2003-12-01), Chen et al.
patent: 2002-7500 (2002-01-01), None
Chinese Office Action, with English translation, issued in Chinese Patent Application No. CN 2005101204168, mailed Dec. 28, 2007.

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