MOS transistor apparatus and method of manufacturing same

Details MOS transistor apparatus and method of manufacturing same MOS transistor apparatus and method of manufacturing same

2005-03-22

2005-03-22

Elms, Richard (Department: 2824)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S347000, C257S364000, C257S365000, C257S366000, C257S407000

Reexamination Certificate

active

06870224

ABSTRACT:
When polycrystalline silicon germanium film is used for gate electrodes in a MOS transistor apparatus, there have been problems of reduced reliability in the gate insulating film, due to stress in the silicon germanium grains. Therefore, a polysilicon germanium film is formed, after forming silicon fine particles of particle size 10 nm or less on an oxide film. As a result, it is possible to achieve a high-speed MOS transistor apparatus using an ultra-thin oxide film having a film thickness of 1.5 nm or less, wherein the Ge concentration of the polycrystalline silicon germanium at its interface with the oxide film is uniform, thereby reducing the stress in the film, and improving the reliability of the gate electrode.

REFERENCES:
patent: 6191445 (2001-02-01), Fujiwara
patent: 6271573 (2001-08-01), Suguro
patent: 6437403 (2002-08-01), Noguchi
patent: 6605520 (2003-08-01), Cheong
patent: 6670263 (2003-12-01), Ballantine et al.
Lee et al. “Investigation of Poly-Si1-xGexfor Dual-Gate CMOS Technology,” IEEE Electron Device Letters 19:247-49 (1998).
Uejima et al. “Highly Reliable Poly-SiGe/Amorphous-Si Gate CMOS,” IEEE IEDM Technical Digest, p. 445-449 (2000).

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