MOS transistor and manufacturing method thereof

Details MOS transistor and manufacturing method thereof MOS transistor and manufacturing method thereof

2011-07-26

2011-07-26

Tran, Tan N (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S351000, C257S358000, C257S360000, C257S363000, C257S516000, C257S543000, C257SE51003

Reexamination Certificate

active

07986007

ABSTRACT:
The structure of the MOS transistor provided in this invention has LDD (lightly doped drain) and halo doped regions removed from the source, the drain or both regions in the substrate for improved linearity range when operated as a voltage-controlled resistor. The removal of the LDD and halo doped regions is performed by simply modifying the standard mask of the MOS process using a logic operation layer with no extra mask required.

REFERENCES:
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patent: 6051856 (2000-04-01), McKay et al.
patent: 6218251 (2001-04-01), Kadosh et al.
patent: 6313687 (2001-11-01), Banu
patent: 6356154 (2002-03-01), Hallen
patent: 6504416 (2003-01-01), Mariani
patent: 7009265 (2006-03-01), Anderson et al.
patent: 2006/0001060 (2006-01-01), Rhodes
patent: 2006/0040450 (2006-02-01), Hsu
China Office Action dated May 11, 2010.

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