Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-11-03
2008-03-04
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S199000, C438S287000, C438S643000, C438S508000
Reexamination Certificate
active
07338898
ABSTRACT:
A method for fabricating a MOS transistor is described. A gate dielectric layer, a first barrier layer, an interlayer, a work-function-dominating layer, a second barrier layer and a poly-Si layer are sequentially formed on a substrate. The interlayer is capable of adjusting the work function of the work-function-dominating layer and wetting the surface of the first barrier layer. The above layers are then patterned into a gate, and a source/drain is formed in the substrate beside the gate.
REFERENCES:
patent: 2004/0178458 (2004-09-01), Eppich et al.
patent: 2005/0023602 (2005-02-01), Forbes et al.
Chiang Wen-Tai
Hsieh Yi-Sheng
Lin Wei-Min
Shiau Wei-Tsun
Yang Chih-Wei
Jianq Chyun IP Office
Le Dung A.
United Microelectronics Corp.
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