MOS termination for low power signaling

Details MOS termination for low power signaling MOS termination for low power signaling

1995-07-03

1996-08-13

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

H03K 1716, H03K 19003

Patent

active

055460160

ABSTRACT:
A low power termination method and apparatus. The termination circuit is typically coupled to a bus through an interface node to receive a rising edge of an input voltage signal. A clamping device is coupled to the interface node and coupled to receive a clamping voltage, the clamping voltage being less than a termination voltage. The termination circuit also includes a bias supply providing a bias voltage. A control terminal of the clamping device is coupled receive the bias voltage, and clamps the interface node when the input voltage signal exceeds a termination voltage. A bias excursion of the bias voltage may be provided responsive to the rising edge so that the clamping device clamps the interface node before the input voltage signal exceeds the termination voltage. Similarly, a second clamping device biased by a second bias supply may be used. The second clamping device clamps the interface node after the input voltage signal falls below an expected low voltage. The second bias supply can provide an excursion responsive to a falling edge of the input voltage signal so that the second clamping device clamps the interface node before the input voltage falls below the expected low voltage.

REFERENCES:
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patent: 5347177 (1994-09-01), Lipp
patent: 5420526 (1995-05-01), Fensch
"A 500-Megabyte/s Data-Rate 4.5M DRAM", Kushiyama, et al., IEEE Journal on Solid-State Circuits, vol. 28, No. 4, Apr. 1993, pp. 490-498.
"A Dynamic Lin-Termination Circuit for Multireceiver Nets", Dolle, IEEE Journal on Solid-State Circuits, vol. 28, No. 12, Dec. 1993, pp. 1370-1373.
"WP 3.7: A CMOS Low-Voltage-Swing Transmission-Line Transceiver", Gunning, et al., 1992 IEEE International Solid-State Circuits Confeence, pp. 58-59.
"The Art of Electronics", Horowitz, et al., Cambridge University Press 1980, p. 42.

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