MOS structure device having asymmetric LDD structure and fabrica

Details MOS structure device having asymmetric LDD structure and fabrica MOS structure device having asymmetric LDD structure and fabrica

1997-11-03

1998-10-27

Wallace, Valencia Martin

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257327, 257336, 257388, 257408, 257412, 257413, 257900, 438286, 438305, H01L 2976, H01L 2994

Patent

active

058281045

ABSTRACT:
An MOS semiconductor device containing an MOSFET with an asymmetric LDD structure, which has in a semiconductor substrate a first heavily doped region, a lightly doped region formed adjacent to the first heavily doped region, and a second heavily doped region formed apart from the first lightly doped region. The first heavily doped region and the lightly doped region act as a drain region of the MOSFET, and the second heavily doped region acts as a source region thereof. A gate electrode composed of a plurality of parts is positioned over a channel region. At least one of the parts has a drain-side end positioned over the lightly doped region and a source-side end positioned over the channel region not to extend to the second heavily doped region. Free design can be realized without layout restriction and fabricated with high reproducibility in large quantities.

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patent: 5164806 (1992-11-01), Nagatomo et al.
patent: 5477070 (1995-12-01), Nam
patent: 5547885 (1996-08-01), Ogoh

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