Static information storage and retrieval – Systems using particular element – Flip-flop
Patent
1996-12-19
1999-04-13
Zarabian, A.
Static information storage and retrieval
Systems using particular element
Flip-flop
365191, G11C 1100
Patent
active
058944346
ABSTRACT:
A semiconductor static random access memory (RAM) array (10) is disclosed. The static RAM array (10) includes a plurality of memory cells (12), where each memory cell (12) is coupled to a write enable switch (34). The write enable switch (34) responsive to a write enable signal (36) is coupled between each memory cell (12) and a voltage source (27) or a voltage ground (29). The write enable switch (34) can disconnect each memory cell (12) from either the voltage source (27) or the voltage ground (29) responsive to the write enable signal.
REFERENCES:
patent: 3493786 (1970-02-01), Ahrons
patent: 4404657 (1983-09-01), Furuyama
patent: 4661928 (1987-04-01), Yasuoka
patent: 5070482 (1991-12-01), Miyaji
patent: 5105100 (1992-04-01), Yamada
patent: 5107137 (1992-04-01), Kinugasa et al.
patent: 5173626 (1992-12-01), Kudou et al.
patent: 5317205 (1994-05-01), Sato
patent: 5392235 (1995-02-01), Nishitani
patent: 5465230 (1995-11-01), Montegari
patent: 5490111 (1996-02-01), Sakata
patent: 5568435 (1996-10-01), Marr
patent: 5612632 (1997-03-01), Mahant-Shetti et al.
"Dynamic MOS RAM'S", R. Proebsting, ICC'77 Chicago, IEEE Catalog No. 77CHI209-6 CSCB, Conference Record vol. 3, pp. 43,4-147-43,4-150.
Donaldson Richard L.
Hoel Carlton H.
Holland Robby T.
Texas Instruments Incorporated
Zarabian A.
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