MOS memory circuit with fast access time

Static information storage and retrieval – Read/write circuit – Including signal clamping

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365203, 365204, 36523006, 3072966, 3072968, 307567, 307568, 323313, G11C 11401

Patent

active

051329360

ABSTRACT:
An improved MOS memory circuit using an MOS clamp circuit on the bitlines which turns on when the voltage on a bitline exceeds a predetermined voltage, thereby drawing current from the bitline to remove excess charge and return the bitline to the predetermined voltage. The clamp circuit of this invention allows prompt read access because reading is not substantially delayed by the excess bitline charge.

REFERENCES:
patent: 3942160 (1976-03-01), Yu
patent: 4100437 (1978-07-01), Hoff
patent: 4185321 (1980-01-01), Iwahashi et al.
patent: 4388537 (1983-06-01), Kanuma
patent: 4464590 (1984-08-01), Rapp
patent: 4473762 (1984-09-01), Iwahashi et al.
patent: 4516224 (1985-05-01), Aoyama
patent: 4901280 (1990-02-01), Patel
patent: 4905197 (1990-02-01), Urai
patent: 4939385 (1990-07-01), Dubujet
patent: 4984256 (1991-01-01), Imai

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

MOS memory circuit with fast access time does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with MOS memory circuit with fast access time, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS memory circuit with fast access time will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-850019

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.