Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1995-10-05
2001-05-08
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S402000, C257S403000
Reexamination Certificate
active
06229188
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a MOS field effect transistor (hereinafter referred to as MOSFET) that operates with low power consumption and at a high speed and which can be, used as a memory device and a switching device in computers. It also relates to the manufacturing method of the MOSFET of the present invention.
2. Prior Arts
Miniaturization of a MOSFET faces difficult problems such as short channel effects in particular. This phenomenon is characterized by lowered threshold voltage. For a given channel doping concentration, as the channel length is reduced, the depletion layer extending towards the gate becomes to serve as an additional depletion layer to the depletion layer at the drain electrode and subsequently reduces the depletion layer at the gate, which eventually lowers the threshold voltage of the device. In addition to this phenomenon, there is a problem in a CMOS structure of latch-up which is a parasitic bipolar action. One approach to avoid latch-up is to increase the impurity concentration of the substrate thereby reducing the resistance of the substrate. However, if the impurity concentration is increased to such a level as to prevent the latch-up, the threshold voltage increases to an undesirable level. Also, if the impurity concentration in the channel region where carriers traverse is high, the effect of scattering by the impurity atoms increases generally resulting in lowered carrier mobility.
SUMMARY OF THE INVENTION
The object of the invention therefore is to solve the problems accompanied with such conventional devices as described hereinabove. In accordance with the invention, a substrate of high impurity doping concentration is used to prevent short channel effects and latch-up, and an epitaxial growth layer with low impurity doping concentration is provided at the channel region to obtain high operation speed and to control threshold voltage.
REFERENCES:
patent: 56-94670 (1981-07-01), None
Aoki Kenji
Takada Ryoji
Adams & Wilks
Ngo Ngan V.
Seiko Instruments Inc.
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