MOS ESD CDM clamp with integral substrate injection...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S127000, C257S170000, C257S356000, C257S360000, C257S409000, C257S452000, C257S484000, C257S605000

Reexamination Certificate

active

06940131

ABSTRACT:
The present invention includes a MOS device (100) that has a P-type substrate (102) and an N-type drain region (104) formed within the substrate (102). An annular N-type source region (106) generally surrounds the drain region (104). The source region (106) serves as both the source for the MOS device (100) and a sacrificial collector guard ring for an electrostatic discharge protection circuit. An annular gate region (110) generally surrounds the drain region (104) and is electrically insulated from the drain region (104) and electrically connected to the source region (106). An annular P-type bulk region (108) generally surrounds the source region (106) and is electrically connected to the source region (106).

REFERENCES:
patent: 5274263 (1993-12-01), Wadsworth
patent: 5371395 (1994-12-01), Hawkins
patent: 6097066 (2000-08-01), Lee et al.
patent: 6437407 (2002-08-01), Ker et al.
patent: 6690067 (2004-02-01), Ker et al.
patent: 6798022 (2004-09-01), Kuroda et al.

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