Static information storage and retrieval – Systems using particular element – Semiconductive
Patent
1998-06-19
1999-11-02
Nelms, David
Static information storage and retrieval
Systems using particular element
Semiconductive
365100, G11C 1136
Patent
active
059782587
ABSTRACT:
A variable resistance material-based memory cell is disclosed for use in an electronic memory. The memory cell includes a MOS diode for delivering large amounts of current to the variable resistance material, as needed during programming of the memory cell. In one embodiment, a buried contact under the gate is used as the drain of the device. The buried contact allows formation of a very short channel, causing a "snapback" phenomenon in the MOS diode and thereby greatly increasing the amount of current flow across the device. This buried contact construction has the additional advantage of reducing the area needed for the memory cell. Additionally, the processing is simple and may be performed using the same techniques normally used during the fabrication of electronic memories.
REFERENCES:
patent: 3423646 (1969-01-01), Cubert et al.
patent: 3796926 (1974-03-01), Cole et al.
patent: 3801966 (1974-04-01), Terao
patent: 4099260 (1978-07-01), Lynes et al.
patent: 4115872 (1978-09-01), Bluhm
patent: 4174521 (1979-11-01), Neale
patent: 4194283 (1980-03-01), Hoffmann
patent: 4203123 (1980-05-01), Shanks
patent: 4227297 (1980-10-01), Angerstein
patent: 4272562 (1981-06-01), Wood
patent: 4442507 (1984-04-01), Roesner
patent: 4458260 (1984-07-01), McIntyre et al.
patent: 4499557 (1985-02-01), Holmberg et al.
patent: 4502208 (1985-03-01), McPherson
patent: 4569698 (1986-02-01), Feist
patent: 4630355 (1986-12-01), Johnson
patent: 4642140 (1987-02-01), Noufi et al.
patent: 4666252 (1987-05-01), Yaniv et al.
patent: 4677742 (1987-07-01), Johnson
patent: 4757359 (1988-07-01), Chiao et al.
patent: 4795657 (1989-01-01), Formigoni et al.
patent: 4804490 (1989-02-01), Pryor et al.
patent: 4809044 (1989-02-01), Pryor et al.
patent: 4823181 (1989-04-01), Mohsen et al.
patent: 4876220 (1989-10-01), Mohsen et al.
patent: 4876668 (1989-10-01), Thakoor et al.
patent: 4881114 (1989-11-01), Mohsen et al.
patent: 4892840 (1990-01-01), Esquivel et al.
patent: 5144404 (1992-09-01), Iranmanesh et al.
patent: 5166096 (1992-11-01), Cote et al.
patent: 5166758 (1992-11-01), Ovshinsky et al.
patent: 5177567 (1993-01-01), Klersy et al.
patent: 5257222 (1993-10-01), Lee
patent: 5296716 (1994-03-01), Ovshinsky et al.
patent: 5335219 (1994-08-01), Ovshinsky et al.
patent: 5359205 (1994-10-01), Ovshinsky
patent: 5363329 (1994-11-01), Troyan
patent: 5510629 (1996-04-01), Karpovich et al.
patent: 5513142 (1996-04-01), Arimoto et al.
patent: 5534711 (1996-07-01), Ovshinsky et al.
patent: 5534712 (1996-07-01), Ovshinsky et al.
patent: 5812441 (1998-09-01), Manning
Prince, "Semiconductor Memories," Memory Device and Process Technology, 118-123, 1983.
Kim and Kim, "Effects of High-Current Pulses on Polycrystalline Silicon Diode with n-type Region Heavily Doped with Both Boron and Phosphorus," J. Appl. Phys., 53(7):5359-5360, 1982.
Neale and Aseltine, "The Application of Amorphous Materials to Computer Memories," IEEE, 20(2):195-205, 1973.
Pein and Plummer, "Performance of the 3-D Sidewall Flash EPROM Cell," IEEE, 11-14, 1993.
Post and Ashburn, "Investigation of Boron Diffusion in Polysilicon and its Application to the Design of p-n-p Polysilicon Emitter Bipolar Transistors with Shallow Emitter Junctions," IEEE, 38 (11):2442-2451, 1991.
Post et al., "Polysilicon Emitters for Bipolar Transistors: A Review and Re-Evaluation of Theroy and Experiment," IEEE, 39(7):1717-1731, 1992.
Post and Ashburn, "The Use of an Interface Anneal to Control the Base Current and Emitter Resistance of p-n-p Polysilicon Emitter Bipolar Transistors," IEEE, 13(8):408-410, 1992.
Rose et al., "Amorphous Silicon Analogue Memory Devices," J. Non-Crystalline Solids, 115:168-170, 1989.
Schaber et al., "Laser Annealing Study of the Grain Size Effect in Polycrystalline Silicon Schottky Diodes," J. Appl. Phys., 53(12):8827-8834, 1982.
Yamamoto et al., "The I-V Characteristics of Polycrystalline Silicon Diodes and the Energy Distribution of Traps in Grain Boundaries," Electronics and Communications in Japan, Part 2, 75(7):51-58, 1992.
Yeh et al., "Investigation of Thermal Coefficient for Polycrystalline Silicon Thermal Sensor Diode," Jpn. J. Appl. Phys., 31(Part 1, No. 2A):151-155, 1992.
Oakley et al., "Pillars--The Way to Two Micron Pitch Multilevel Metallisation," IEEE, 23-29, 1984.
Prince, "Semiconductor Memories," Memory Device and Process Technology, 118-123, 1983.
Micro)n Technology, Inc.
Nelms David
Tran M.
LandOfFree
MOS diode for use in a non-volatile memory cell background does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS diode for use in a non-volatile memory cell background, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS diode for use in a non-volatile memory cell background will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2144395