Monolithic semiconductor chip interconnection technique and arra

Details Monolithic semiconductor chip interconnection technique and arra Monolithic semiconductor chip interconnection technique and arra

1988-12-27

1991-06-04

Hille, Rolf

357 71, 357 68, H01L 2312, H01L 2508, H01L 2512

Patent

active

050218697

ABSTRACT:
An interconnection arrangement and technique for a single semiconductor chip containing incomplete electric circuitry and having electric surface terminations permitting said incomplete electric circuitry to be externally interconnected, the interconnection arrangement being mountable on the semiconductor chip and capable of electically communicating with the semiconductor chip through electric surface terminations on the top surface of the semiconductor chip and on the bottom surface of the interconnection arrangement.

REFERENCES:
patent: 4021838 (1977-05-01), Warwick
patent: 4074342 (1978-02-01), Honn et al.
patent: 4818728 (1989-04-01), Rai et al.

Affiliated with

Also associated with

Rating

Monolithic semiconductor chip interconnection technique and arra does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Monolithic semiconductor chip interconnection technique and arra, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Monolithic semiconductor chip interconnection technique and arra will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1030513