Monolithic programmable format pixel array

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

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345100, G09G 334

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active

061079790

ABSTRACT:
A spatial light modulator (10) with a programmable format pixel array (14). The pixel array (14) has a programmable row address circuit (30), and a partitionable programmable column data loading circuit (32) which permits the array (14) to be operated in multiple formats compatible with NTSC, PAL, SECAM and other broadcasting standards. The pixel array (14) is of the DMD type. The array can be configured as 864.times.576 pixel array, a 768.times.576 pixel array, an 864.times.480 pixel array, or a 640.times.480 pixel array. This format is controlled by hardware (30,32) designed into the DMD chip. A partitionable shift register (32) has a MUXED input to provide testability, permitting some or all of the data input lines (D0-D53) to be utilized, and also allowing pixel data to be loaded back into the shift register (32) for functional verification. A programmable row address circuit (30) automatically addresses a subset of pixel rows as a function of a single input.

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