Monitoring a data processor to detect abnormal operation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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Details

C713S154000, C726S004000, C726S022000

Reexamination Certificate

active

07627807

ABSTRACT:
Monitoring logic20for monitoring a data processor10to detect if it is not operating as anticipated, the monitoring logic20comprising: a timer27operable to measure a predetermined time; detection logic24; and control logic22; wherein said detection logic is operable to detect a data or instruction access to at least one predetermined address and in response to not detecting said data or instruction access within said predetermined time, said control logic is operable to send a control signal to said data processor, said control signal controlling said data processor to perform a predetermined operation.

REFERENCES:
patent: 7039947 (2006-05-01), Indefrey et al.
patent: 2005/0132217 (2005-06-01), Srinivasan et al.
patent: 2 356 271 (2001-05-01), None
patent: 05-210539 (1993-08-01), None
patent: 05-257752 (1993-10-01), None
patent: 06-222960 (1994-08-01), None
patent: 07-036742 (1995-02-01), None

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