Monitor pattern of semiconductor device and method of...

Details Monitor pattern of semiconductor device and method of... Monitor pattern of semiconductor device and method of...

2006-01-31

2006-01-31

Lee, Eugene (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S379000, C257S543000, C257S536000

Reexamination Certificate

active

06992327

ABSTRACT:
A plurality of diffused resistors and a plurality of wirings (resistive elements) are alternately disposed along a virtual line, and those diffused resistors and wirings are connected in series by contact vias. In the same wiring layer as that of the wirings, a dummy pattern is formed so as to surround a formation region of the wirings and the diffused resistors. A space between the dummy pattern and the wirings is set in accordance with, for example, a minimum space between wirings in a chip formation portion.

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