Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated – With heat sink embedded in encapsulant
Patent
1991-05-23
1992-12-15
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
With heat sink embedded in encapsulant
165 802, 361381, 361389, 257675, H01L 2328, H01L 2348
Patent
active
051722135
ABSTRACT:
A major issue in the semiconductor industry is the amount of power that a silicon device dissipates. As the density of silicon integrated circuits increases with improvements in wafer processing, so does the amount of heat which must be evacuated. If the power of the silicon devices exceeds one watt, the plastic encapsulating material normally yields to the more expensive ceramic or metal packages which can dissipate thermal energy more efficiently. The conventional molded package is a silicon device such as a chip mounted onto a copper paddle which spreads the heat radially in the material and is bonded to leads via thin wires. The three major paths for the heat to escape are by conduction through the molding compound to the surface of the package where removal is by convection, and by conduction from the silicon device through the thin wires to the leads of the package and then to the printed circuit board, and by a heat conducting paddle which radially spreads the heat through the molding compound. In each instance, the heat dissipating path is through a relatively poor thermal conductor. In accordance with the principles of the invention, there is provided an improved thermal path for conducting heat from the silicon device to the surface of the plastic package. The improved thermal path comprises a post of heat conducting material positioned to extend from the silicon device to a surface of the plastic package. One end of the post is positioned to receive heat generated by the silicon device and the other end is exposed to air at the surface of the plastic package. A waist section of the post located between the ends of the post has a dimension which is different than that of the end. Additionally the ends can have dimensions which are either equal or unequal. The post configuration enables the molded package to capture the post without creating cracks in the molded package.
REFERENCES:
patent: 4532539 (1985-07-01), Frister
patent: 4649992 (1987-03-01), Geen et al.
patent: 4910583 (1990-03-01), Behr et al.
patent: 5053855 (1991-10-01), Michii et al.
patent: 5105259 (1992-04-01), McShane et al.
AT&T Bell Laboratories
Hille Rolf
Ostrowski David
Weiss E.
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