Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-05-11
2002-06-04
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S795000, C361S768000, C174S258000, C174S256000, C257S265000
Reexamination Certificate
active
06400574
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to microelectronic packaging and, more particularly, to a method and apparatus for encapsulating a ball grid array (BGA) in a molding compound.
2. Description of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
The packaging of electrical circuits is a key element in the technological development of any device containing electrical components. Several technologies have been developed to provide a means of mounting these electrical components on a surface of a substrate, such as a printed circuit board (PCB). Fine pitch surface mount (FPT), pin grid array (PGA), and ball grid array (BGA) are examples of leading surface mount technologies.
BGA technology offers several advantages over FPT and PGA. Among the most often cited advantages of BGA are: reduced co-planarity problems, since there are no leads; reduced placement problems; reduced paste printing problems; reduced handling damage; smaller size; better electrical and thermal performance; better package yield; better board assembly yield; higher interconnect density; multi-layer interconnect options; higher number of IO's for a given footprint; easier extension to multi-chip modules; and faster design-to-production cycle time.
A BGA semiconductor package generally includes a semiconductor chip mounted on the top surface of a substrate. The semiconductor chip may be electrically coupled to the substrate by bond wires. The substrate contains conductive routing which allows the signals to pass from the semiconductor chip on the top side of the substrate, through the substrate, and to pads on the backside of the substrate. A plurality of solder balls are deposited and electrically coupled to the pads on the backside of the substrate to be used as input/output terminals for electrically connecting the substrate to a PCB or other external device.
One problem with conventional BGA packaging is the need to protect the electrical interface between the chip and the substrate. To protect the semiconductor chip and bond wires from external elements such as moisture, dust, or impact, the semiconductor chip is often encapsulated in a molding compound. The implementation of the encapsulation process presents many challenges.
The present invention may address one or more of the problems set forth above.
SUMMARY OF THE INVENTION
Certain aspects commensurate in scope with the disclosed embodiments are set forth below. It should be understood that these aspects are presented merely to provide the reader with a brief summary of certain forms the invention might take and that these aspects are not intended to limit the scope of the invention. Indeed, the invention may encompass a variety of aspects that may not be set forth below.
In one embodiment of the present invention, there is provided a molded ball grid array including a substrate, a semiconductor chip attached to the substrate and a molding compound disposed on the substrate. The molding compound is deposited so as to form cups arranged to expose pads on the surface of the substrate.
In another embodiment of the present invention, there is provided a system having a processor and a memory circuit in communication with the processor. The memory circuit includes a substrate, a memory chip attached to the substrate and a molding compound disposed on the substrate. The molding compound is deposited so as to form cups arranged to expose pads on the surface of the substrate.
In yet another embodiment of the present invention, there is provided a memory module. The memory module includes a substrate, memory chips attached to the substrate and a molding compound disposed on the substrate. The molding compound is deposited so as to form cups arranged to expose pads on the surface of the substrate.
In still another embodiment of the present invention, there is provided a system for molding a die in a circuit package. The system includes a first support plate and a second support plate. The second support plate is proximately positioned with respect to the first support plate and has protrusions configured to form cups in the package to align with pads on the die.
In still another embodiment of the present invention, there is provided a method of molding a circuit package including the acts of: disposing the circuit package on a first support plate, the circuit package consisting of a semiconductor device coupled to a substrate; disposing a second support plate on the circuit package such that protrusions extending radially from the second support plate are brought in contact with pads on the substrate; and injecting a molding compound onto the circuit package.
REFERENCES:
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patent: 6144576 (2000-11-01), Leddige et al.
patent: 6165885 (2000-12-01), Gaynes et al.
patent: 6181569 (2001-01-01), Chakravorty
Bolken Todd O.
Stephenson William R.
Street Bret K.
Bui Hung
Fletcher Yoder & Van Someren
Gaffin Jeffrey
Micro)n Technology, Inc.
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