Moisture barrier gap fill structure and method for making the sa

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438761, 438763, H01L 214763, H01L 2131

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active

060461020

ABSTRACT:
Disclosed is a method for making a passivation coated semiconductor structure. The method includes providing a substrate having a metallization line patterned over the substrate. The metallization line defining at least one interconnect feature having a first thickness, and depositing a first silicon nitride barrier layer having a second thickness over the substrate and the metallization line. The method further including applying an oxide material over the first silicon nitride barrier layer that overlies the substrate and the metallization line. The oxide application includes a deposition component and a sputtering component, and the sputtering component is configured to remove at least a part of an edge of the first silicon nitride layer. The edge is defined by the metallization line underlying the first silicon nitride layer. Further, the method includes depositing a second silicon nitride layer over the oxide material that is applied by the deposition component and the edge of the first silicon nitride layer sputtered by the sputtering component to establish a moisture and mobile ion repelling barrier between the second and first silicon nitride layers.

REFERENCES:
patent: 5795821 (1998-08-01), Bacchetta et al.
patent: 5795833 (1998-08-01), Yu et al.
patent: 5851603 (1998-12-01), Tsai et al.
patent: 5880519 (1999-03-01), Bothra et al.

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