Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region
Reexamination Certificate
1999-06-17
2001-10-23
Booth, Richard (Department: 2812)
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Ion implantation of dopant into semiconductor region
C438S585000
Reexamination Certificate
active
06306738
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to high-density semiconductor devices, and in particular, to a method for modulating a gate polysilicon doping profile by performing a sidewall implantation.
BACKGROUND OF THE INVENTION
Typical metal-oxide semiconductor (MOS) transistors include a gate formed on a silicon substrate. The gate typically includes an insulating layer, such as an oxide layer, that separates the silicon substrate from a heavily doped conductor, such as a polysilicon layer. Conventionally, the gate is formed such that the polysilicon layer has a uniform conductivity across the width of the gate by providing the polysilicon layer with a uniform doping profile across the width of the gate. Source and drain regions are formed in the substrate beneath the gate and are separated by a channel region. The oxide layer prevents current from flowing from the source region to the drain region through the gate until an input voltage reaches a threshold voltage.
Conventional construction of MOS transistors, namely the uniform doping profile of MOS transistors, restricts the ability of the gate to operate in an optimal manner. For example, by modifying the doping profile of the polysilicon layer across the width of the gate, a gate can be produced that provides increased current flow and/or reduced off-leakage and parasitic capacitance in the source region or drain region asymmetrically as compared to a conventional gate having a uniform doping profile. Additionally, by varying the gate doping profile the work function, localized threshold voltage, and overlap capacitance of the gate can be modified as needed when designing the performance characteristics of the gate.
There is a need for improved methods for modulating a gate doping profile to provide a gate having desired performance characteristics.
SUMMARY OF THE INVENTION
The present invention provides a device and method to optimize the performance characteristics of a gate. The invention achieves this result by modulating a gate polysilicon doping profile by performing a sidewall implantation to form a gate having desired performance characteristics. By allowing a designer to achieve desired performance characteristics, the present invention provides a method to optimize the performance characteristics for a specific gate electrode layout.
The method for modulating a gate polysilicon doping profile includes forming a gate on a substrate. Typically, the substrate is made of silicon and the gate includes an oxide layer deposited on a top surface on the substrate, and a polysilicon layer formed on a top surface of the gate oxide layer. The method includes forming a mask over the oxide layer and a portion of the top surface of the gate, such that a sidewall of the gate is exposed by a gap in the mask. Note that the formation of the mask may not be necessary if the later ion implantation process is performed in a precise manner such that the ion implantation is concentrated on the sidewall of the gate. In this instance it is best if an oxide layer is formed on the top of the polysilicon layer prior to etching the gate to prevent the implant from getting on top of the polysilicon layer.
The method further includes implanting ions in the gate through the sidewall and into the polysilicon layer. The ion implantation is preferably performed by projecting the ions at an angle that is not perpendicular to the top surface of substrate and in a direction that is towards the surface of sidewall. The ion implantation can be performed at any angle between zero and ninety degrees from a line perpendicular to the top surface of the substrate, with forty-five degrees being the preferred angle. The ion implantation process can be performed using a type of dopant that either increases or decreases the net dopant concentration in the polysilicon layer in a region of the gate adjacent the sidewall and adjacent a gate oxide layer.
The ions are driven within the polysilicon layer such that implanted ions are positioned in a region extending inward from the sidewall by a distance of no more than fifty percent of a width of the gate. Once the ion implantation is completed, the mask is removed using any suitable process so that the gate can be further processed as necessary. Once the ions are implanted within the gate and the desired doping profile is achieved, care must be taken to select subsequent implant drives so as not to drive the dopant from the intended location.
Additional advantages and other features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from the practice of the invention. The advantages of the invention may be realized and obtained as particularly pointed out in the appended claims.
REFERENCES:
patent: 4714519 (1987-12-01), Pfiester
patent: 4745079 (1988-05-01), Pfeister
patent: 5360751 (1994-11-01), Lee
patent: 5516707 (1996-05-01), Loh et al.
patent: 5804496 (1998-09-01), Duane
Advanced Micro Devices , Inc.
Booth Richard
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