Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Treating substrate prior to coating
Reexamination Certificate
2002-10-18
2004-03-02
Valentine, Donald R (Department: 1742)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Treating substrate prior to coating
C205S220000, C205S640000, C204S198000, C204S22400M, C204S22400M, C204S269000
Reexamination Certificate
active
06699380
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
Embodiments of the invention generally relate to a modular dry in dry out electrochemical processing system.
2. Description of the Related Art
Metallization of sub-quarter micron sized features is a foundational technology for present and future generations of integrated circuit manufacturing processes. More particularly, in devices such as ultra large scale integration-type devices, i.e., devices having integrated circuits with more than a million logic gates, the multilevel interconnects that lie at the heart of these devices are generally formed by filling high aspect ratio, i.e., greater than about 4:1, interconnect features with a conductive material, such as copper or aluminum. Conventionally, deposition techniques such as chemical vapor deposition (CVD) and physical vapor deposition (PVD) have been used to fill these interconnect features. However, as the interconnect sizes decrease and aspect ratios increase, void-free interconnect feature fill via conventional metallization techniques becomes increasingly difficult. Therefore, plating techniques, i.e., electrochemical plating (ECP) and electroless plating, have emerged as promising processes for void free filling of sub-quarter micron sized high aspect ratio interconnect features in integrated circuit manufacturing processes.
In an ECP process, for example, sub-quarter micron sized high aspect ratio features formed into the surface of a substrate (or a layer deposited thereon) may be efficiently filled with a conductive material, such as copper. ECP plating processes are generally multistage processes, wherein a substrate is prepared for plating, i.e., one or more preplating processes, brought to a plating cell for a plating process, and then the substrate is generally post treated after the plating process. The preplating process generally includes processes such as depositing a barrier/diffusion layer and/or a seed layer on the substrate, precleaning the seed layer and/or substrate surface prior to commencing plating operations, and other preplating operations that are generally known in the art. Once the preplating processes are complete, the substrate is generally transferred to a plating cell where the substrate is contacted with a plating solution and the desired plating layer is deposited on the substrate. Once the plating processes are complete, then the substrate is generally transferred to a post treatment cell, such as a rinse cell, bevel clean cell, drying cell, or other post treatment process cell generally used in the semiconductor art.
However, one challenge associated with conventional plating systems is that the preplating operations, plating operations, and post plating operations are all generally conducted in separate cells. As such, a substantial amount of time is expended transferring substrates between the respective processing cells. This time required to transfer substrates between the respective processing cells or stations has a detrimental impact upon the system throughput. Furthermore, since several of the processes involved in electrochemical plating are wet processes, the transfer of substrates between processing cells inherently results in dripping, which may contribute to contamination and cell cleaning problems. Therefore, there is a need for an electrochemical plating system configured to minimize the transfer time between substrate pretreatment processes, plating processes, and post plating processes, as well as minimizing or eliminating the contamination and cleaning challenges created by wet substrate transfer processes.
SUMMARY OF THE INVENTION
Embodiments of the invention may provide a substrate processing system, wherein the substrate processing system includes 2 primary components. The first component is an interface section having at least one first substrate transfer robot positioned therein, and the second component is at least one processing module in communication with the interface section, the at least one processing module having a pretreatment and post treatment cell, a processing cell, and a second substrate transfer robot positioned therein.
Embodiments of the invention may further provide a substrate processing system, wherein the processing system includes an interface section having at least one first substrate transfer robot positioned therein, and at least one processing module in communication with the interface section, the at least one processing module having a pretreatment and post treatment cell, a processing cell, and a second substrate transfer robot positioned therein.
Embodiments of the invention may further provide an electrochemical processing system. The processing system may include a factory interface having a substrate transfer robot positioned therein, the factory interface being configured to communicate with at least one substrate containing cassette, and at least one substrate processing module in detachable communication with the factory interface, each of the at least one substrate processing modules including a pretreatment/post treatment cell and an electrochemical processing cell.
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Chen Guan-Shian
Yang Michael X.
Applied Materials Inc.
Moser Patterson & Sheridan
Valentine Donald R
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