Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-09-11
2007-09-11
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10862729
ABSTRACT:
A system is employed for modifying a hierarchical description of a design to reveal the data flow of the design. The modified design provides a more favorable input for block placement. In one embodiment, the modifications includes any one of or a combination of moving hard macros to a higher level of the hierarchical description of the design, flattening modules that are bigger than a threshold, and/or flattening star blocks. Up to three clustering strategies are employed as part of the flattening process, including name-based clustering, external connection based clustering and gate clustering.
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Panda Uma
Poghosyan Vahagn
Wein Enno
Bever Patrick T.
Bever Hoffman & Harms LLP
Synopsys Inc.
Whitmore Stacy A
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