Modified viterbi detector for jitter noise dominant channels

Details Modified viterbi detector for jitter noise dominant channels Modified viterbi detector for jitter noise dominant channels

2001-03-02

2004-04-27

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C375S341000

Reexamination Certificate

active

06728928

ABSTRACT:

BACKGROUND OF INVENTION
1. Field of Invention
This invention relates to improvements in data detection techniques and hardware using a Viterbi algorithm, and more particularly to improvements in methods and apparatuses for performing Viterbi data detection in channels in which channel noise is dependent upon data or jitter effects, and to improvements in mass data storage devices, or the like, using same.
2. Relevant Background
Transition jitter noise is one of the major sources of detection errors in high density recording channels. Implementation complexity of the optimal detector for such channels is high, due to the data dependency and correlated nature of the jitter noise. In the past, it has been proposed to modify the branch metric of the Viterbi algorithm applied to partial response (PR) channels using a multiplicative factor to adjust the branch metric to account for jitter induced noise in the channel. However, such multiplicative adjustments for in each branch metric in the Viterbi trellis are complicated and are difficult to implement in hardware.
More particularly, in one attempt to make adjustments for data detection in the presence of jitter noise in read channels of mass data storage devices, the possible areas of data uncertainty are scaled, depending upon the magnitude of the jitter noise that is detected. However, the scaling is implemented via the multiplicative algorithm, as mentioned. Although such multiplicative algorithm is considered to be relatively accurate in affecting the scaling adjustment and simpler compared to the optimal detector implementation, it still requires significant hardware complexity.
For a data dependent noise channel, the maximum likelihood (ML) detector finds a noiseless channel output sequence which maximizes the likelihood function. The ML detector implementation for such channel requires large number of states in the Viterbi trellis and matrix multiplication for each branch metric calculation. A compromised solution has been proposed in which off-diagonal elements of the covariance matrix are ignored in the metric calculation. The resulting modified branch metric assuming Gaussian noise is defined by In(&sgr;
k
2
)+(z
k
−y
k
)
2
/&sgr;
k
2
, where &sgr;
k
2
is the noise variance, z
k
is an observation sample, and y
k
is a noiseless channel output at time k, respectively. The calculation of the metric requires additional multiplication and addition over the conventional Viterbi algorithm.
What is needed is a simplified technique for modifying the Viterbi algorithm that does not require the application of a multiplicative metric adjustment, and which can be implemented in hardware with relative ease.
SUMMARY OF INVENTION
In light of the above, therefore, it is an object of the invention to provide a simplified technique for modifying the Viterbi algorithm that does not require the application of a multiplicative metric adjustment, and which can be implemented in hardware with relative ease.
It is another object of the invention to provide a method for adjusting a Viterbi detector in dependence upon the magnitude of expected jitter noise variance existing in a channel of a mass data storage device, as created by magnetic flux or equivalently input binary data transitions in the channel.
It is still another object of the invention to provide a method for adjusting the decision boundary between two words or equivalently between two competing branches in the Viterbi trellis to be detected or selected using an additive adjustment coefficient based upon estimated jitter noise variance existing in the read channel of a mass data storage device.
It is yet another object of the invention to provide a method for calculating an adjustment coefficient for use in modifying a Viterbi detector for use in a read channel of a mass data storage device.
Thus, to address detection errors produced by transition jitter noise, a hardware efficient detector is provided in which the branch metric of the Viterbi algorithm is modified by an additive term and applied to partial response (PR) channels. The detector may also be combined with run length limited modulation coding. The additional complexity over the conventional Viterbi algorithm to incorporate the modified branch metric is an addition for each branch metric in the Viterbi trellis.
According to a broad aspect of the invention, a Viterbi detector is presented. The Viterbi detector includes circuitry for receiving an received noisy signal whose input binary data is NRZ encoded where the data transition from one value to another potentially creates jitter induced noise. In the EEPR4 equalized channel which is one of the classes in a partial response (PR) channel, the detector decodes the received value using modified branch metric &lgr;
k
(i)
=(z
k
−y
k
(i)
)
2
−&agr;
(i)
, in which &agr;
(i)
is m &agr;, &agr; is a positive constant, m is a number of transitions within the most current four symbol periods, &lgr;
k
(i)
is a branch metric at time k for an i
th
Viterbi branch, k is a time period, z
k
is a received value at time k, &lgr;
k
(i)
is a metric used to determine the next state of the Viterbi based upon a maximum likelihood evaluation for an i
th
branch, and y
k
is an ideal sample associated with an i
th
branch.
According to another broad aspect of the invention, a method for decoding a received value is presented. The method includes determining whether the received value is in a space associated with one of the possible binary input data values. The space has a boundary substantially equidistant from the two possible points each of which is associated with one of possible decode input binary data. If the received value is within a first portion of the space closest to the point associated with first decode value, the received value is decoded as the first decode value. If the received value is within a second portion of the space closest to the second point associated with the second decode value, it is decoded as the second decode value. A value that estimates an amount of jitter noise in a channel is produced. The boundary is then moved by an additive amount determined based on the value that estimates an amount of jitter noise, wherein the boundary is moved to enlarge whichever of the first and second spaces that contains a larger amount of jitter noise.
According to another broad aspect of the invention, a Viterbi detector is presented. The Viterbi detector includes for determining whether a received value is either of first or second decode value. The circuitry has first and second spaces containing a set of possible received values. The first and second spaces respectively surround each of the points associated with the first and second decode values. The circuitry has a boundary separating the first and second spaces. If a detected value is within the first space it is decoded as the first decode value, and if the detected value is within the second space, it is decoded as the second decode value. Circuitry is provided for producing a value that estimates an amount of jitter noise contained in the received value which is a function of a series of binary input data. Circuitry is also provided for moving the boundary by an amount determined based on the value that estimates an amount of jitter noise. The boundary is thus moved to enlarge whichever of the first and second spaces that contains the largest amount of jitter noise.
According to yet another broad aspect of the invention, a mass data storage device of the type in which a sensor detects magnetic transitions recorded on a magnetic media is presented. The mass data storage device includes a Viterbi detector, which includes for determining whether a received value is either of first or second decode value. The circuitry has first and second spaces containing a set of possible points associated with the first and second decode values. The first and second spaces respectively surround each of the points associated with first and second decode values. The circuitry also has a boundary separ

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