Modified third order phase-locked loop

Details Modified third order phase-locked loop Modified third order phase-locked loop

1997-10-21

2001-02-13

Luther, William (Department: 2731)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C327S157000, C331S017000

Reexamination Certificate

active

06188739

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to phase-locked loop circuits, and more particularly to a phase-locked loop circuit which exhibits a wide capture range and a low quality factor (Q) to prevent ringing and improve stability.
2. Description of Related Art
Digital data transmission has become increasingly important in the modern communications era. All digital communication systems require some degree of synchronization to incoming signals by receivers. At the heart of all phase synchronization circuits is some version of a phase-locked loop (PLL).
FIG. 1
illustrates a schematic of a basic phase-locked loop circuit
100
. Phase-locked loops are servo-control loops, whose controlled parameter is the phase of a locally generated replica of the incoming carrier signal. Phase-locked loops have three basic components: a phase detector
102
, a loop filter
104
and a signal-controlled oscillator
106
. The phase detector
102
is a device that produces a measure of the difference in phase between an incoming signal
110
and the local replica
120
. As the incoming signal
110
and the local replica
120
change with respect to each other, the phase difference
130
(or phase error) becomes a time-varying signal into the loop filter
104
. The loop filter
104
governs the response of the phase-locked loop
100
to these variations in the error signal
130
. A well-designed phase-locked loop
100
should be able to track changes in the phase of the incoming signal
110
, but not be overly responsive to receiver noise. The signal-controlled oscillator
106
is the device that produces the carrier replica
120
. The signal-controlled oscillator
106
is an oscillator whose frequency is controlled by a voltage or current level
140
at the input of the signal-controlled oscillator
106
.
In many phase-locked loops, the oscillator is driven using a current signal. However, in an IC implementation the center frequency of oscillation varies widely with IC processing. This requires a wide capture range for the phase-locked loop
100
, which implies that the control current supplied by the loop filter
104
to the current-controlled oscillator
106
can be high. When the control current of the loop filter
104
is high, the transconductance of transistors in the loop filter that generate the current are also high. In traditional implementations, creating the wide capture range can cause a Q factor which is too high. This high Q causes the phase-locked loop to either ring excessively or become unstable.
A traditional solution for this problem is to use two phase-locked loops whose current- (or voltage-) controlled oscillators are closely matched. However, this increases the area, power, and noise from the extra phase-locked loop.
Thus, there is a need for a phase-locked loop exhibiting a wide capture range and low Q without adding surface area needed to fabricate the phase-locked loop, dramatically increasing the power consumption or increasing noise to the overall phase-locked loop circuit.
SUMMARY OF THE INVENTION
To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a phase-locked loop circuit which exhibits a wide capture range and a low quality factor (Q) to prevent ringing and improved stability.
The present invention solves the above-described problems by providing a phase-locked loop exhibiting a low Q without adding surface area needed to fabricate the phase-locked loop, dramatically increasing the power consumption and increasing noise to the overall phase-locked loop circuit.
A system in accordance with the principles of the present invention includes a comparator which generates an error signal that represents a difference between an input reference signal and an output replica signal, an oscillator which generates the output replica signal in response to a control signal and a loop filter which generates the control signal based on the error signal such that phase and frequency characteristics of the input reference signal and the output replica signal track together. The loop filter includes a first integrator operatively coupled through a threshold limit detector to a second integrator, and the threshold limit detector includes a mechanism which limits supply of an electric charge to the second integrator when the first integrator is proximate to one of an upper limit and a lower limit of an operating range for the first integrator.
One aspect of the present invention is that the oscillator generates the output replica signal in response to the control signal such that the output replica signal frequency tracks the input reference signal frequency as an integer multiple of the input reference signal frequency.
Another aspect of the present invention is that the oscillator includes a current controlled oscillator which generates the output replica signal in response to varying electric current levels of the control signal.
Another aspect of the present invention is that the loop filter further includes a pair of charge pumps operating in tandem as a pump-up charge pump and a pump-down charge pump, the pair of charge pumps are operatively coupled to the threshold limit detector and the second integrator such that the threshold limit detector activates the pump-up charge pump to supply a positive electric charge to a capacitor within the second integrator when the first integrator is proximate to the upper limit of the operating range for the first integrator and such that the threshold limit detector activates the pump-down charge pump to supply a negative electric charge to a capacitor within the second integrator when the first integrator is proximate to the lower limit of the operating range for the first integrator.
Yet another aspect of the present invention is that the loop filter further includes a duty cycle limiter switch operatively coupled between the pair of charge pumps and the second integrator.
Another aspect of the present invention is that the limiter switch limits the supply of the electric charge to a capacitor within the second integrator to a predetermined time period.
Another aspect of the present invention is that the second integrator has a predetermined transconductance value such that the loop filter operates in a stable operating range.
These and various other advantages and features of novelty which characterize the invention are pointed out with particularity in the claims annexed hereto and form a part hereof. However, for a better understanding of the invention, its advantages, and the objects obtained by its use, reference should be made to the drawings which form a further part hereof, and to accompanying descriptive matter, in which there are illustrated and described specific examples of an apparatus in accordance with the invention.


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