Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating
Reexamination Certificate
1999-08-16
2001-03-20
Smith, Matthew (Department: 2825)
Active solid-state devices (e.g., transistors, solid-state diode
With means to control surface effects
Insulating coating
C118S668000
Reexamination Certificate
active
06204551
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an improved device for fabricating semiconductor devices. More specifically, the present invention relates to an improved semiconductor fabricating device which includes a hot plate for baking an SOG (spin-on-glass) coated wafer so as to evaporate the solvent contained in the SOG coating. One of the main advantages of the SOG coating device of the present invention is that it can effectively prevent the problem associated with the formation of micro-cracks in the solidified SOG film, thus improving the yield rate during the fabrication of ultra-large-scale integrated (ULSI) circuits, without requiring major capital investment nor the need for substantial modifications of the SOG coating device or process.
BACKGROUND OF THE INVENTION
In the fabrication of ultra-large scale-integration (ULSI) circuits, vertical stacking, or integration, of metal wiring circuits to form multilevel interconnection has recently become a common approach to increase circuit performance and increase the functional complexity of the circuits. One drawback of multilevel interconnection is the loss of topological planarity resulting from various photolithographic and etching processes. To alleviate these problems, the wafer is planarized at various stages in the fabrication process to minimize non-planar topography and thus its adverse effects. One of the first steps in the planarization process is to coat a liquefied dielectric material, such as silicon dioxide, on the surface of the wafer, using the so-called spin-on-glass (SOG) process, by which a coating machine is used to spin the wafer while the liquefied silicon dioxide is being applied onto the wafer. After the SOG process, the wafer is placed on top of a hot plate, so as to evaporate the solvent contained in the SOG layer so as to solidify the SOG layer. Other non-glass material, typically a polymer material, can be used in forming such SOG layer.
FIGS. 1A and 1B
show the top view and side view, respectively, of a conventional hot plate used in conjunction with an SOG coater. After the wafer
1
is SOG coated, it is placed on top of a loader robot
2
which moves along the tracks
3
formed in the hot plate
4
. After the loader robot
2
moves the SOG-coated wafer
1
to the predetermined place, it then drops the wafer
1
onto the surface of the hot plate
4
, where the solvent contained in the liquefied SOG layer is evaporated to form a solidified SOG layer.
Because of the ever-increasing consumer demand and expectation for better and cheaper IC products, a semiconductor manufacturer must look at every possible avenue to increase production yield rate so as to reduce the overall product cost. After having carefully examined a large number of production failures, the inventor of the present invention discovered that one of the common types of failures was related to micro-cracks that occurred in the solidified SOG layer and which can be visualized from a scanning electronic microscope. Because an SOG layer is typically required in each vertical integration, the possibility of failure due to a damaged SOG layer multiplies in today's high density IC chips. At the present time, this problem has not be identified, nor has any solution been proposed, by the semiconductor industry.
SUMMARY OF THE INVENTION
The primary object of the present invention is to develop an improved semiconductor fabrication device so as to reduce the production yield failure rate. More specifically, the primary object of the present invention is to modify appropriate portions of a semiconductor fabrication device, without involving major capital expense or substantially affecting the fabricating process, so as to eliminate or at least minimize the formation of micro-cracks in the solidified SOG layer, and thus eliminate one possible cause of production yield failure in the fabrication of ULSI semiconductor devices.
After extensive research and investigations, the inventor has discovered that the formation of micro-cracks in the solidified SOG layer can be attributed to the unsteady state heat transfer problem that takes place during the baking of the liquefied SOG layer to evaporate solvent contained therein. More specifically, the inventor of the present invention discovered that the conventional wafer loader robots are designed primarily for one-dimensional movement. As a result, the wafer is very rapidly placed on the hot plate, causing the exterior portion of the liquefied SOG layer to solidify before its interior portion has an opportunity to experience an adequate temperature rise. The solvent entrapped within the solidified SOG “shell” can prolong the heating process thus increasing the extent of thermal stress which can tend to cause the SOG layer to form cracks. But, more importantly, the relatively large volume change associated with the phase change (solidification) of the liquefied SOG inside the solidified SOG shell can cause large thermal and mechanical stress to be exerted on the already solidified SOG layer and cause it to develop micro-cracks.
After the cause of the micro-crack problem is identified, an apparent solution is to modify the baking (i.e., solidification) step to cause it to gradually lower the wafer onto the hot plate so as not to subject the liquefied SOG layer to a sudden heating condition. However, the conventional loader robot is, relatively speaking, very bulky, it would be difficult and quite expensive to provide a mechanism which can precisely control the movement of the loader robot in a second direction, i.e., in the vertical direction which is perpendicular to the movement of the loader robot.
In the present invention, the SOG coater hot plate is modified such that a plurality of controllable support columns are provided beneath and through the hot plate. After the loader robot transports the wafer to the predetermined place, the controllable support columns will take over and allow the wafer to be gradually lowered onto the hot plate. By not subjecting the wafer to a sudden heat as in the conventional process, the liquefied SOG layer solidifies in a controlled and more uniform manner. Unexpectedly superior results were observed from the present invention in that the modified SOG coater hot plate seems to have eliminated the cause of micro-crack formation in the solidified SOG layer.
REFERENCES:
patent: 5565034 (1996-10-01), Nanbu et al.
patent: 5686143 (1997-11-01), Matsukawa et al.
Lee Calvin
Liauh W. Wayne
Smith Matthew
Winbond Electronics Corp.
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