Modified machine architecture with partial memory updating

Details Modified machine architecture with partial memory updating Modified machine architecture with partial memory updating

2006-10-18

2010-02-09

Bragdon, Reginald G (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S153000, C711S170000, C711S173000

Reexamination Certificate

active

07660960

ABSTRACT:
The updating of only some memory locations in a multiple computer environment in which at least one applications program (50) executes simultaneously on a plurality of computers M1, M2. . . . Mn each of which has a local memory, is disclosed. Memory locations (A, B, D, E, X) in said local memory are categorized into two groups. The first group of memory locations (X1, X2, . . . Xn, A1, A2, . . . An) are each accessible by other computers. The second group of memory locations (B, E) are each accessible only by the computer having the local memory including the memory location. Changes to the values of memory locations in the first group only are transmitted to all other computers. A promotion mechanism is disclosed to promote memory locations in the second group into the first group in the event that application program execution means that a memory location in said second group is referred to by a memory location in the first group (ie the first group location now points to the second group location).

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