Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent
1996-12-30
1999-11-23
Thai, Tuan V.
Electrical computers and digital processing systems: memory
Address formation
Address mapping
711200, 711203, 711205, 711206, 711209, 711220, 711221, 707200, G06F 1210
Patent
active
059918624
ABSTRACT:
A logical address and a pointer entry for a file in an indirect address file system are translated into a physical address. A decision module tests a pointer flag in a present pointer entry. The pointer entry has a pointer and a pointer flag to identify whether the pointer points to a data storage area or a metadata storage area. The decision module indicates whether the pointer is a data pointer or a metadata pointer. In response to the decision module indicating the pointer is a data pointer, a set module combines the data pointer with the logical address to generate a physical address. A split module, in response to the decision module indicating the pointer is a metadata pointer, divides the logical address into a first portion as an index value and a remaining portion as an offset value. An update module then sets the logical address to the offset value. A retrieve module combines the metadata pointer with the index value to get the next pointer entry. Each metadata pointer points to a next successive level of indirect addressing in the plurality of levels of indirect addressing. Also, each data pointer points directly to the data storage area. As a result all levels of indirect addressing, which are from a level having the pointer entry with a data pointer to a last indirect addressing level, are by-passed.
REFERENCES:
patent: 5465337 (1995-11-01), Kong
patent: 5696925 (1997-12-01), Koh
patent: 5732405 (1998-03-01), Ho et al.
Knearl Homer C.
Kubida William J.
Sun Microsystems Inc.
Thai Tuan V.
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