Model stamping matrix check technique in circuit simulator

Details Model stamping matrix check technique in circuit simulator Model stamping matrix check technique in circuit simulator

2007-11-20

2007-11-20

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

10773541

ABSTRACT:
The present invention includes a method for detecting model stamping errors during circuit simulation without the need for golden data. The method checks for model stamping errors by determining whether entries in model stamping matrices interrelate according to a plurality of preset rules before circuit equations are solved.

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