Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2005-01-04
2005-01-04
Wamsley, Patrick (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C327S108000, C327S534000
Reexamination Certificate
active
06838908
ABSTRACT:
A mixed-voltage I/O buffer circuit that prevents leakages through a driver stage PMOS transistor is provided. The buffer circuit has a first part that prevents leakage through a parasitic diode of the transistor and a second part that prevents leakage through the transistor when the transistor is turned on by a signal on a bonding pad having a voltage level higher than a power supply voltage of the buffer circuit. The buffer circuit provides biases approximately equal to the high voltage signal to a gate and a substrate terminal of the PMOS transistor when the bonding pad has the high voltage signal thereon, and provides a bias approximately equal to the power supply voltage of the buffer circuit to the gate and substrate of the PMOS transistor when the bonding pad has a low voltage signal thereon.
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Chuang Che-Hao
Jiang Hsin-Chin
Ker Ming-Dou
Lee Kuo-Chung
Industrial Technology Research Institute
Wamsley Patrick
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